US 11,756,793 B2
Semiconductor device manufacturing method
Yohei Ishii, Hillsboro, OR (US); Kathryn Maier, Hillsboro, OR (US); and Medhat Khalil, Hillsboro, OR (US)
Assigned to HITACHI HIGH-TECH CORPORATION, Tokyo (JP)
Filed by Hitachi High-Tech Corporation, Tokyo (JP)
Filed on Jun. 19, 2020, as Appl. No. 16/906,206.
Claims priority of provisional application 62/954,101, filed on Dec. 27, 2019.
Prior Publication US 2021/0202259 A1, Jul. 1, 2021
Int. Cl. H01L 21/306 (2006.01); H01L 21/3213 (2006.01); H01L 21/3065 (2006.01); H01L 21/308 (2006.01)
CPC H01L 21/30621 (2013.01) [H01L 21/3065 (2013.01); H01L 21/30604 (2013.01); H01L 21/32136 (2013.01); H01L 21/32138 (2013.01); B81C 2201/0136 (2013.01); H01L 21/308 (2013.01)] 7 Claims
OG exemplary drawing
 
1. A semiconductor device manufacturing method comprising the steps of:
etching a semiconductor material formed on a substrate to have a trapezoidal shape in a cross-section view using a plasma;
forming a damage layer in an etched sidewall linear tapered portion of the semiconductor material which has the trapezoidal shape in the cross-section view, wherein the damage layer is formed on a surface of the substrate and does not extend into a material forming the substrate; and
removing the damage layer.