CPC G11C 11/40622 (2013.01) [G11C 11/4096 (2013.01); G11C 11/40615 (2013.01); G11C 29/42 (2013.01)] | 20 Claims |
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the memory device, to perform operations comprising:
detecting a memory access operation performed on a first memory unit of the memory device;
modifying a value of a counter associated with the first memory unit wherein the value of the counter corresponds to a number of occurrences of memory access operations performed on the first memory unit;
determining that the value of the counter satisfies a threshold criterion, wherein the threshold criterion is based on a random or pseudo-random number within a margin of an average number of memory access operations; and
responsive to determining that the value of the counter satisfies the threshold criterion, performing a refresh operation on a second memory unit.
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