US 11,755,472 B2
Periodic flush in memory component that is using greedy garbage collection
Kishore Kumar Muchherla, Fremont, CA (US); Peter Sean Feeley, Boise, ID (US); Sampath K. Ratnam, Boise, ID (US); Ashutosh Malshe, Fremont, CA (US); and Christopher S. Hale, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jul. 14, 2021, as Appl. No. 17/375,478.
Application 17/375,478 is a continuation of application No. 16/175,005, filed on Oct. 30, 2018, granted, now 11,106,577.
Prior Publication US 2021/0342262 A1, Nov. 4, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 12/128 (2016.01); G06F 12/02 (2006.01); G06F 12/0897 (2016.01)
CPC G06F 12/0253 (2013.01) [G06F 12/0246 (2013.01); G06F 12/0897 (2013.01); G06F 12/128 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
initiating, by a processing device, a process to write valid data of at least a first block of a plurality of blocks stored at a first memory to a second memory, wherein the first memory has a first memory type and the second memory has a second memory type different from the first memory type;
identifying, by the processing device, at least one indicator relating to when data was written to the plurality of blocks stored at the first memory;
determining, by the processing device, whether an age of the valid data of the first block exceeds a threshold age based on the at least one indicator; and
in response to determining that the age of the valid data of the first block exceeds the threshold age, writing, by the processing device, the valid data of the first block to the second memory.