US 11,755,350 B2
Controller for a memory component
Antonino Mondello, Messina (IT); and Alberto Troia, Munich (DE)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on May 16, 2022, as Appl. No. 17/745,546.
Application 17/745,546 is a continuation of application No. 16/624,948, granted, now 11,334,377, previously published as PCT/IB2019/000478, filed on May 31, 2019.
Prior Publication US 2022/0276885 A1, Sep. 1, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/455 (2018.01); G01R 31/3185 (2006.01); G06F 9/32 (2018.01); G06F 9/4401 (2018.01); G06F 9/445 (2018.01); G06F 11/07 (2006.01); G06F 15/78 (2006.01)
CPC G06F 9/455 (2013.01) [G01R 31/318555 (2013.01); G01R 31/318558 (2013.01); G01R 31/318597 (2013.01); G06F 9/328 (2013.01); G06F 9/4401 (2013.01); G06F 9/44521 (2013.01); G06F 11/0736 (2013.01); G06F 15/7807 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A controller for a memory component, comprising:
a processing unit; and
a memory unit coupled to the processing unit, the memory unit comprising a first area configured to store a user firmware and a second area configured to store a controller firmware;
wherein:
the processing unit is configured to:
compare a memory address of a program instruction to be executed with a reference value; and
determine actions associated with the program instruction based on the comparison; and
the memory component is coupled to a System-on-Chip (SoC) structure.