CPC G06F 9/30098 (2013.01) [G06F 9/3012 (2013.01); G06F 9/3001 (2013.01); G06F 9/3013 (2013.01); G06F 9/30036 (2013.01); G06F 9/30109 (2013.01); G06F 9/384 (2013.01)] | 19 Claims |
1. A method of processing instructions in a processor, the method comprising:
providing a main register file associated with the processor, the main register file having a plurality of main register file entries for storing data;
providing an accumulator register file associated with a dense math execution unit, the accumulator register file having a plurality of accumulator register file entries for storing data;
mapping at least one of the plurality of main register file entries to at least one of the plurality of accumulator register file entries;
performing dense math operations with the dense math execution unit;
writing results of the dense math operations performed with the dense math execution unit to the accumulator register file; and
writing data in the at least one of the plurality of accumulator register file entries to the at least one of the main register file entries to which the at least one of the plurality of accumulator register entries is mapped.
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