CPC G06F 9/30014 (2013.01) [G06F 9/30145 (2013.01); G06F 9/3855 (2013.01); G06F 9/3893 (2013.01); G06F 17/16 (2013.01)] | 20 Claims |
1. A computer-implemented method comprising:
determining, by a processor, a first precision and a first shape of a first input matrix to a compute array of the processor, wherein the processor comprises an instruction fetch/decode unit operable to fetch and decode a plurality of instructions comprising at least one instruction to perform a plurality of linear algebra operations, a dispatch/issue unit operable to dispatch the instructions to an issue queue after decoding, and the compute array is associated with the issue queue;
determining, by the processor, a second precision and a second shape of a second input matrix to the compute array of the processor; and
repeating a plurality of linear algebra operations in parallel within the compute array to update a result matrix in an accumulator register based on the first input matrix, the second input matrix, and a number of rank updates of the result matrix to store in the accumulator register.
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