CPC G06F 3/0655 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0673 (2013.01)] | 8 Claims |
1. A method for an associative memory device, the method comprising:
storing a plurality of pairs of multi-bit operands X and Y in rows of a memory array of said associative memory device, each pair in a different column of said memory array;
cells in a column connected by a first bit-line providing a value of activated cells and a second bit-line providing an inverse value of said activated cells, bits of X in first rows and bits of Y in second rows;
reading an inverse value of a bit stored in each of said second rows using said second bit-line and writing said inverse value to third rows; and
concurrently, on all columns, performing multi-bit add operations between a value of X, an inverse value of Y and a carry-in bit initiated to 1, thereby providing a difference between X and Y in each of said columns.
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