CPC G06F 3/061 (2013.01) [G06F 3/0625 (2013.01); G06F 3/0646 (2013.01); G06F 3/0647 (2013.01); G06F 3/0656 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G06F 13/161 (2013.01); G11C 8/00 (2013.01); Y02D 10/00 (2018.01)] | 18 Claims |
1. A system, comprising:
a host configured to generate commands; and
a memory device, coupled to the host, comprising:
a plurality of banks of memory cells;
a controller coupled to the plurality of banks configured to:
receive a command from the host with instructions to transfer data between the plurality of banks, the command including source bank information and destination bank information; and
transfer the data on an internal data bus between the plurality of banks of memory cells via internal data path operations that use the source bank information to identify a source bank to read the data from and the destination bank information to identify a destination bank to write the data to, wherein the internal data path operations include performing a silent read command that transfers data from the plurality of banks to a number of bidirectional buffers isolated from a number of DQs.
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