US 11,755,048 B2
Differential to single-ended high bandwidth compensator
Sergio Carlo Rodriguez, Hillsboro, OR (US); Alexander Lyakhov, Portland, OR (US); Gerhard Schrom, Hillsboro, OR (US); Keith Hodgson, Hillsboro, OR (US); Sarath S. Makala, Hillsboro, OR (US); and Sidhanto Roy, Hillsboro, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Apr. 1, 2021, as Appl. No. 17/220,802.
Application 17/220,802 is a continuation of application No. 16/575,259, filed on Sep. 18, 2019, granted, now 10,976,764.
Prior Publication US 2021/0223811 A1, Jul. 22, 2021
Int. Cl. H02M 3/157 (2006.01); G05F 1/652 (2006.01); G05F 1/44 (2006.01); H03M 1/66 (2006.01); H02M 1/00 (2006.01)
CPC G05F 1/652 (2013.01) [G05F 1/44 (2013.01); H02M 3/157 (2013.01); H02M 1/0025 (2021.05); H03M 1/66 (2013.01)] 19 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a differential to single-ended stage comprising a first input, a second input, and an output;
a differential to single-ended compensator coupled to receive a voltage from the output of the differential to single-ended stage and to output a control voltage for a pulse width modulator of a buck converter; and
a control switch coupled between the first input and the output of the differential to single-ended stage, wherein the differential to single-ended compensator is switchable via the control switch between a type-III compensator in a voltage control mode of the buck converter and a type-II compensator in a current control mode.