US 11,754,421 B2
Resolver signal processing device, drive apparatus, resolver signal processing method, and program
Chikara Morito, Tokyo (JP); and Hajime Shiraishi, Tokyo (JP)
Assigned to TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION, Chuo-ku (JP)
Appl. No. 17/257,050
Filed by TOSHIBA MITSUBISHI-ELECTRIC INDUSTRIAL SYSTEMS CORPORATION, Chuo-ku (JP)
PCT Filed Mar. 1, 2019, PCT No. PCT/JP2019/008115
§ 371(c)(1), (2) Date Dec. 30, 2020,
PCT Pub. No. WO2020/178904, PCT Pub. Date Sep. 10, 2020.
Prior Publication US 2021/0270638 A1, Sep. 2, 2021
Int. Cl. G01D 5/244 (2006.01); H02P 21/18 (2016.01); G01D 1/04 (2006.01)
CPC G01D 5/244 (2013.01) [G01D 1/04 (2013.01); H02P 21/18 (2016.02)] 10 Claims
OG exemplary drawing
 
1. A resolver signal processing device comprising:
a resolver signal processing unit;
input buffer circuits configured to:
receive a two-phase signal from a resolver, and
supply signals based on the two-phase signal to the resolver signal processing unit; and
output buffer circuits configured to supply, to the resolver, a two-phase excitation signal based on an excitation signal supplied from the resolver signal processing unit,
wherein the resolver signal processing unit is configured to:
acquire a signal of phase A and a signal of phase B orthogonal to phase A, which are the signals based on the two-phase signal output by the resolver in response the two-phase excitation signal, the signal of phase A and the signal of phase B being amplitude-modulated;
calculate a deviation between a first product and a second product, the first product being obtained by multiplying the signal of phase A by a cosine value based on a reference phase θref, the second product being obtained by multiplying the signal of phase B by a sine value based on the reference phase θref;
carry out a proportional integration operation on the basis of the deviation, the proportional integration operation including a proportional operation and a first integration operation and being defined to converge the deviation on zero;
carry out a second integration operation of integrating a value generated from a result of the proportional integration operation and output a result of the second integration operation as phase information of the resolver;
output the result of the proportional integration operation with respect to the deviation in a case that the result of the proportional integration operation with respect to the deviation satisfies a predetermined condition;
output a predetermined limiting value instead of a sum of the proportional operation and the first integration operation in a case that the sum of the proportional operation and the first integration operation does not satisfy the predetermined condition;
convert the result of the second integration operation or the predetermined limiting value into the excitation signal; and
integrate the predetermined limiting value instead of the result of the proportional integration operation with respect to the deviation in a case that the result of the proportional integration operation with respect to the deviation does not satisfy the predetermined condition.