CPC H10N 69/00 (2023.02) [G06N 10/00 (2019.01); H10N 60/0912 (2023.02); H10N 60/12 (2023.02)] | 20 Claims |
1. A device, comprising:
a qubit lattice on a substrate, the qubit lattice comprising one or more first qubit tiles having a first shape tessellated with one or more second qubit tiles having a second shape, wherein the first shape is different from the second shape, wherein the first shape and the second shape are not hexagonal shapes, wherein one of the one or more first qubit tiles has twelve qubits and twelve interqubit connection buses, and wherein one of the one or more second qubit tiles has twelve qubits and twelve interqubit connection buses.
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