US 11,750,287 B2
Optical DSP operating at half-baud rate with full data rate converters
Sadok Aouini, Gatineau (CA); Robert G. Gibbins, Stittsville (CA); Yalmez Yazaw, Nepean (CA); Harvey Mah, Ottawa (CA); and Naim Ben-Hamida, Nepean (CA)
Assigned to Ciena Corporation, Hanover, MD (US)
Filed by Ciena Corporation, Hanover, MD (US)
Filed on May 25, 2021, as Appl. No. 17/329,335.
Prior Publication US 2022/0385365 A1, Dec. 1, 2022
Int. Cl. H04B 10/2513 (2013.01); H04B 10/2569 (2013.01); H03M 1/00 (2006.01)
CPC H04B 10/25133 (2013.01) [H03M 1/00 (2013.01); H04B 10/2569 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An optical Digital Signal Processor (DSP) circuit comprising:
a digital core configured to implement digital signal processing functionality and configured to operate at a plurality of baud rates including a full baud rate and a half-baud rate; and
an analog interface comprising a Digital-to-Analog Converter (DAC) section and an Analog-to-Digital Converter (ADC) section, wherein the analog interface is connected to the digital core and is configured to operate at the full baud rate when the digital core is configured to operate at any of the plurality of baud rates, wherein the analog interface includes a plurality of dividers and multiplexers to half a clock from the analog interface to the digital core when the digital core operates at the half-baud rate.