CPC H03F 1/0211 (2013.01) [H03F 1/56 (2013.01); H03F 3/245 (2013.01); H04B 1/40 (2013.01); H04W 52/52 (2013.01); H03F 2200/102 (2013.01); H03F 2200/222 (2013.01); H03F 2200/318 (2013.01); H03F 2200/387 (2013.01); H03F 2200/451 (2013.01)] | 20 Claims |
1. A front end system including a power amplifier configured to receive a radio frequency input signal with a plurality of power amplifier transistors that are connected in parallel with one another, and a bias network that biases the plurality of power amplifier transistors with at least one resistor and at least one capacitor, both the at least one resistor and the at least one capacitor connected in parallel between a DC bias voltage and the radio frequency input signal, an output of the at least one resistor and an output of the at least one capacitor, the radio frequency input signal in communication with a base of at least one of the plurality of power amplifier transistors, and the bias network has a reactance that is operable to track an intrinsic input capacitance of the plurality of power amplifier transistors.
|