US 11,749,749 B2
Semiconductor device
Takui Sakaguchi, Kyoto (JP); Masatoshi Aketa, Kyoto (JP); and Yuki Nakano, Kyoto (JP)
Assigned to ROHM CO., LTD., Kyoto (JP)
Filed by ROHM CO., LTD., Kyoto (JP)
Filed on Jul. 9, 2021, as Appl. No. 17/371,752.
Application 17/371,752 is a continuation of application No. 16/479,886, granted, now 11,088,272, previously published as PCT/JP2018/002357, filed on Jan. 25, 2018.
Claims priority of application No. 2017-011609 (JP), filed on Jan. 25, 2017.
Prior Publication US 2021/0336049 A1, Oct. 28, 2021
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/78 (2006.01); H01L 21/04 (2006.01); H01L 29/06 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01)
CPC H01L 29/7806 (2013.01) [H01L 21/049 (2013.01); H01L 29/0696 (2013.01); H01L 29/1608 (2013.01); H01L 29/66068 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor layer having a first main surface on one side and a second main surface on the other side;
a unit cell including a diode region of a first conductivity type formed in a surface layer portion of the first main surface, a well region of a second conductivity type formed in the surface layer portion of the first main surface along a peripheral edge of the diode region, and a first conductivity type region formed in a surface layer portion of the well region;
a gate electrode layer that faces the well region and the first conductivity type region across a gate insulating layer, and that has a side wall located on the first conductivity type region;
an insulating film that covers over the gate electrode layer; and
a first main surface electrode electrically connected to the diode region and the first conductivity type region on the first main surface, the first main surface electrode forming a Schottky junction with the diode region,
wherein the first main surface of the semiconductor layer includes a recessed portion that is formed in a region located at a side of the gate electrode layer such as to be recessed toward the second main surface and that exposes at least a part of the first conductivity type region,
the insulating film has a first portion that covers the recessed portion and extends along the recessed portion from the side wall of the gate electrode layer and a second portion that covers the side wall of the gate electrode layer and extends along the side wall of the gate electrode layer, and
a thickness of the first portion of the insulating film perpendicular to an extending direction of the first portion of the insulating film is greater than a thickness of the second portion of the insulating film perpendicular to an extending direction of the second portion of the insulating film.