US 11,749,737 B2
Memory device with bottom-select-gate structure and method for forming the same
Zhongwang Sun, Wuhan (CN); Zhong Zhang, Wuhan (CN); Lei Liu, Wuhan (CN); Wenxi Zhou, Wuhan (CN); and Zhiliang Xia, Wuhan (CN)
Assigned to YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed by YANGTZE MEMORY TECHNOLOGIES CO., LTD., Wuhan (CN)
Filed on Oct. 13, 2021, as Appl. No. 17/500,340.
Application 17/500,340 is a continuation of application No. 16/918,259, filed on Jul. 1, 2020, granted, now 11,183,575.
Application 16/918,259 is a continuation of application No. PCT/CN2020/092081, filed on May 25, 2020.
Prior Publication US 2022/0037490 A1, Feb. 3, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/423 (2006.01); H10B 41/41 (2023.01); H10B 43/40 (2023.01); H01L 21/28 (2006.01)
CPC H01L 29/42372 (2013.01) [H01L 29/40114 (2019.08); H01L 29/40117 (2019.08); H10B 41/41 (2023.02); H10B 43/40 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A memory device, comprising:
a first bottom-select-gate (BSG) structure, comprising cut slits extending vertically through the first BSG structure;
a cell-layers structure on the first BSG structure; and
gate-line slits extending vertically through the cell-layers structure and the first BSG structure and arranged along a lateral direction to distinguish a plurality of regions in a block of the memory device, wherein:
the gate-line slits comprise a first gate-line slit between first and second regions of the plurality of regions, the first gate-line slit including gate-line sub-slits, and
the cut slits comprise a first cut-slit in the second region and connecting to a gate-line sub-slit of the first gate-line slit to define a first BSG in a first portion of the second region, wherein:
the first BSG in the first portion of the second region is electrically connected to cell strings in the first region through an inter portion between the gate-line sub-slit and an adjacent gate-line sub-slit of the first gate-line slit.