US 11,749,717 B2
Transistor with embedded isolation layer in bulk substrate
Uzma Rana, Slingerlands, NY (US); Anthony K. Stamper, Burlington, VT (US); Johnatan A. Kantarovsky, South Burlington, VT (US); Steven M. Shank, Jericho, VT (US); and Siva P. Adusumilli, Burlington, VT (US)
Assigned to GLOBALFOUNDRIES U.S. INC., Malta, NY (US)
Filed by GLOBALFOUNDRIES U.S. INC., Malta, NY (US)
Filed on May 6, 2022, as Appl. No. 17/738,179.
Application 17/738,179 is a continuation of application No. 16/939,213, filed on Jul. 27, 2020, granted, now 11,380,759.
Prior Publication US 2022/0262900 A1, Aug. 18, 2022
Int. Cl. H01L 29/06 (2006.01); H01L 21/762 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/8234 (2006.01); H01L 21/763 (2006.01); H01L 29/10 (2006.01)
CPC H01L 29/0653 (2013.01) [H01L 21/763 (2013.01); H01L 21/76264 (2013.01); H01L 21/76283 (2013.01); H01L 21/823481 (2013.01); H01L 29/1095 (2013.01); H01L 29/66681 (2013.01); H01L 29/7816 (2013.01); H01L 29/7841 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure comprising:
a first well in a semiconductor substrate, the first well extending between a deep trench isolation structure on both sides of a gate structure;
a second well in the semiconductor substrate, the second well comprising a dopant different than the first well and extending on one side of the gate structure within the first well;
a shallow trench isolation structure within the second well;
a drift region within the second well;
a source implant in the first well; and
a drain implant in a drift region within the second well and being remotely positioned from the shallow trench isolation structure.