US 11,749,713 B2
Capacitor including perovskite material, semiconductor device including the capacitor, and method of manufacturing the capacitor
Jeongil Bang, Suwon-si (KR); Seungwoo Jang, Suwon-si (KR); Hyosik Mun, Hwaseong-si (KR); Younggeun Park, Suwon-si (KR); and Jooho Lee, Hwaseong-si (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Jun. 28, 2022, as Appl. No. 17/851,836.
Application 17/851,836 is a continuation of application No. 17/096,239, filed on Nov. 12, 2020, granted, now 11,417,724.
Claims priority of application No. 10-2020-0084344 (KR), filed on Jul. 8, 2020.
Prior Publication US 2022/0328615 A1, Oct. 13, 2022
Int. Cl. H01L 21/00 (2006.01); H01L 49/02 (2006.01); H10B 53/30 (2023.01); H01L 21/02 (2006.01)
CPC H01L 28/60 (2013.01) [H01L 28/56 (2013.01); H10B 53/30 (2023.02); H01L 21/02197 (2013.01); H01L 21/02266 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A capacitor comprising:
a lower electrode including a perovskite structure;
an upper electrode including a perovskite structure;
a first dielectric layer, including a perovskite structure, between the lower electrode and the upper electrode; and
a second dielectric layer, including a perovskite structure and having a band gap energy greater than that of the first dielectric layer, between the first dielectric layer and the upper electrode,
wherein a degree of a lattice mismatch between the lower electrode and the first dielectric layer is about 5% or less and a degree of a lattice mismatch between the lower electrode and the second dielectric layer is about 5% or less,
wherein a ratio of a thickness of the first dielectric layer to a total thickness of the first dielectric layer and the second dielectric layer is about 70% or more,
wherein a ratio of a thickness of the second dielectric layer to the total thickness of the first dielectric layer and the second dielectric layer is about 30% or less, and
wherein the degree of lattice mismatch between the lower electrode and the first dielectric layer is less than the degree of lattice mismatch between the lower electrode and the second dielectric layer.