US 11,749,671 B2
Integrated circuit structures with well boundary distal to substrate midpoint and methods to form the same
Kaustubh Shanbhag, Slingerlands, NY (US); and Glenn Workman, Austin, TX (US)
Assigned to GlobalFoundries U.S. Inc., Malta, NY (US)
Filed by GLOBALFOUNDRIES U.S. Inc., Santa Clara, CA (US)
Filed on Oct. 9, 2020, as Appl. No. 17/67,033.
Prior Publication US 2022/0115368 A1, Apr. 14, 2022
Int. Cl. H01L 27/02 (2006.01); H01L 21/8238 (2006.01); H01L 21/762 (2006.01)
CPC H01L 27/0207 (2013.01) [H01L 21/7624 (2013.01); H01L 21/823892 (2013.01)] 18 Claims
OG exemplary drawing
 
8. An integrated circuit (IC) structure comprising:
a substrate having a first doping type;
a deep well within the substrate, the deep well having a second doping type opposite the first doping type, wherein an interface between the substrate and the deep well defines a well boundary within the substrate;
a first active semiconductor region over the substrate and the deep well, the first active semiconductor region having the second doping type, wherein the first active semiconductor region includes a first end over the substrate and a second end over the deep well such that the well boundary is vertically aligned with a bottom surface of the first active semiconductor region;
a second active semiconductor region over the deep well, the second active semiconductor region having the first doping type, wherein the second active semiconductor region is horizontally distal to the well boundary;
a gate structure over the first active semiconductor region and the second active semiconductor region;
a power rail adjacent a first end of the gate structure; and
a grounding rail adjacent a second end of the gate structure.