US 11,749,668 B2
PSPI-based patterning method for RDL
ChangOh Kim, Incheon (KR); and JinHee Jung, Incheon (KR)
Assigned to STATS ChipPAC Pte. Ltd, Singapore (SG)
Filed by STATS ChipPAC Pte. Ltd., Singapore (SG)
Filed on Jun. 9, 2021, as Appl. No. 17/343,402.
Prior Publication US 2022/0399323 A1, Dec. 15, 2022
Int. Cl. H01L 25/00 (2006.01); H01L 21/78 (2006.01); H01L 21/56 (2006.01); H01L 25/065 (2023.01); H01L 23/552 (2006.01)
CPC H01L 25/50 (2013.01) [H01L 21/56 (2013.01); H01L 21/78 (2013.01); H01L 23/552 (2013.01); H01L 25/0652 (2013.01); H01L 2225/06524 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A method of making a semiconductor device, comprising:
providing a first semiconductor package layer;
disposing a photosensitive polyimide (PSPI) layer over the first semiconductor package layer;
forming a pattern in the PSPI layer;
forming a conductive layer over the PSPI layer;
removing the PSPI layer to leave the conductive layer in the pattern on the first semiconductor package layer;
singulating the first semiconductor package layer;
disposing a tape over the first semiconductor package layer after singulation; and
forming a shielding layer over the first semiconductor package layer and tape.