CPC H01J 49/422 (2013.01) [G06N 10/00 (2019.01); H01J 49/16 (2013.01); H01J 49/24 (2013.01); H01J 49/42 (2013.01)] | 17 Claims |
1. An ion-trap enclosure comprising:
a chip carrier having a first surface and a second surface that is distal to the first surface;
an ion trap, wherein the ion trap is disposed on a substrate that is disposed on the first surface;
a source that is dimensioned and arranged to provide an atomic flux that predominantly includes neutral atoms of a first material to the ion trap along a first axis;
a first housing, the first housing and the first surface being joined at a first seal such that the first housing and the first surface collectively define a first chamber that contains the ion trap, wherein the first housing includes a first window that enables optical coupling between the ion trap and a first light signal that is directed along a second axis that is substantially orthogonal to the first axis, the first light signal being operative for photo-ionizing at least one neutral atom of the plurality thereof at the ion trap; and
a second housing, the second housing and the second surface being joined at a second seal such that the second housing and the second surface collectively define a second chamber that contains the source;
wherein the first chamber and second chamber are fluidically coupled.
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