CPC G11C 16/349 (2013.01) [G11C 16/16 (2013.01); G11C 16/26 (2013.01); G11C 16/3404 (2013.01); G11C 16/3477 (2013.01)] | 20 Claims |
1. A memory sub-system comprising:
a memory component storing a set of instructions; and
a processing device, operatively coupled with the memory component, to execute the set of instructions stored in the memory component, the set of instructions, when executed by the processing device, configuring the processing device to perform operations comprising:
destroying data on a memory block of a memory device;
verifying the data on the memory block is destroyed based on at least one of: a count of logical high bits in the data and an error code correction check on the data; and
providing a passing data destruction status for the memory block based on verifying the data on the memory block is destroyed.
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