US 11,749,357 B2
Feedback for power management of a memory die using capacitive coupling
Baekkyu Choi, San Jose, CA (US); Fuad Badrieh, Boise, ID (US); and Thomas H. Kinsley, Boise, ID (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Jan. 9, 2023, as Appl. No. 18/94,698.
Application 18/094,698 is a division of application No. 17/514,858, filed on Oct. 29, 2021, granted, now 11,574,687.
Application 17/514,858 is a division of application No. 16/798,893, filed on Feb. 24, 2020, granted, now 11,177,007, issued on Nov. 16, 2021.
Prior Publication US 2023/0162802 A1, May 25, 2023
Int. Cl. G11C 5/14 (2006.01); G11C 16/30 (2006.01); G06F 1/28 (2006.01); G06F 1/3296 (2019.01)
CPC G11C 16/30 (2013.01) [G06F 1/28 (2013.01); G06F 1/3296 (2013.01); G11C 5/14 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
an array of memory cells;
a pin for providing output of loopback information based at least in part on a loopback setting of the apparatus;
a capacitive component coupled with the pin for communicating an alternating current (AC) signal at the pin; and
a controller operable to cause the apparatus to:
determine that the loopback setting indicates that the apparatus is operating in a mode different than a loopback mode;
set the pin to an inactive state based at least in part on determining that the apparatus is operating in the mode different than the loopback mode;
determine, after setting the pin to the inactive state, that a supply voltage for the array of memory cells is outside a target range associated with the supply voltage; and
generate the AC signal at the pin based at least in part on determining that the supply voltage is outside the target range.