US 11,749,351 B2
Memory controller and method of operating the memory controller
Dong Uk Lee, Icheon-si (KR); Hae Chang Yang, Icheon-si (KR); and Hun Wook Lee, Icheon-si (KR)
Assigned to SK hynix Inc., Icheon-si (KR)
Filed by SK hynix Inc., Icheon-si (KR)
Filed on Aug. 17, 2021, as Appl. No. 17/404,652.
Claims priority of application No. 10-2021-0033373 (KR), filed on Mar. 15, 2021.
Prior Publication US 2022/0293186 A1, Sep. 15, 2022
Int. Cl. G11C 16/04 (2006.01); G11C 16/34 (2006.01); G11C 16/10 (2006.01); G11C 16/14 (2006.01); G11C 16/08 (2006.01); G11C 16/30 (2006.01); G11C 16/26 (2006.01)
CPC G11C 16/102 (2013.01) [G11C 16/08 (2013.01); G11C 16/14 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory controller that controls a memory device including a memory block, the memory controller comprising:
an initial program controller configured to control the memory device to program at least one or more monitoring memory cells from among memory cells respectively connected to monitoring word lines from among a plurality of word lines connected to the memory block;
a pre-read controller configured to generate a shifting information of a threshold voltage distribution of the monitoring memory cells based on a result of reading the monitoring memory cells before a read operation is performed on the memory block; and
a pre-program controller configured to control the memory device to perform the read operation after applying a pre-program voltage having a voltage level determined according to the shifting information to the plurality of word lines.