US 11,749,343 B2
Memory management device, system and method
Nitin Chawla, Noida (IN); Tanmoy Roy, Greater Noida (IN); and Anuj Grover, New Delhi (IN)
Assigned to STMicroelectronics International N.V., Geneva (CH)
Filed by STMICROELECTRONICS INTERNATIONAL N.V., Geneva (CH)
Filed on Jan. 18, 2022, as Appl. No. 17/578,086.
Application 17/578,086 is a continuation of application No. 16/894,527, filed on Jun. 5, 2020, granted, now 11,257,543.
Claims priority of provisional application 62/866,429, filed on Jun. 25, 2019.
Prior Publication US 2022/0139453 A1, May 5, 2022
Int. Cl. G11C 13/00 (2006.01); G06F 9/50 (2006.01); G11C 29/00 (2006.01); G11C 29/26 (2006.01); G11C 29/44 (2006.01); G06N 3/063 (2023.01)
CPC G11C 13/004 (2013.01) [G06F 9/5016 (2013.01); G06N 3/063 (2013.01); G11C 13/0026 (2013.01); G11C 13/0028 (2013.01); G11C 13/0069 (2013.01); G11C 29/006 (2013.01); G11C 29/26 (2013.01); G11C 2029/4402 (2013.01); G11C 2211/561 (2013.01)] 27 Claims
OG exemplary drawing
 
1. A device, comprising:
a memory having a memory array organized as a plurality of rows intersecting a plurality of columns, wherein, in operation, memory cells of a cut of the memory array store information indicative of reliability types of regions of the memory, including information indicative of reliability types of regions of the memory array; and
control circuitry coupled to the memory, wherein the control circuitry, in operation, responds to a request to allocate memory to a process sharing the memory by:
determining a request type associated with the request to allocate memory; and
allocating memory to the process based on the request type associated with the request to allocate memory and the stored information indicative of reliability-types stored in the cut of the memory array.