US 11,749,339 B2
Method of performing internal processing operation of memory device
Pavan Kumar Kasibhatla, Suwon-si (KR); Seong-il O, Suwon-si (KR); and Hak-soo Yu, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Aug. 8, 2022, as Appl. No. 17/883,498.
Application 17/883,498 is a continuation of application No. 17/369,010, filed on Jul. 7, 2021, granted, now 11,482,278.
Application 17/369,010 is a continuation of application No. 16/251,983, filed on Jan. 18, 2019, granted, now 11,074,961, issued on Jul. 27, 2021.
Claims priority of application No. 10-2018-0088682 (KR), filed on Jul. 30, 2018.
Prior Publication US 2022/0383938 A1, Dec. 1, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 11/4091 (2006.01); G11C 11/408 (2006.01); G06F 15/78 (2006.01); G11C 11/4096 (2006.01); G11C 7/10 (2006.01); G11C 11/4093 (2006.01)
CPC G11C 11/4091 (2013.01) [G06F 15/7821 (2013.01); G11C 7/1006 (2013.01); G11C 11/4087 (2013.01); G11C 11/4093 (2013.01); G11C 11/4096 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A memory device comprising:
a memory cell array including a plurality of memory cells; and
a processor-in-memory (PIM) configured to perform an internal processing operation in response to an internal processing operation command,
wherein, in a normal mode, the memory device is configured to perform a data transaction operation between a memory controller and the memory cell array,
wherein, in an internal processing mode, the PIM determines a first command indicating a type of the internal processing operation, transmits the first command to the memory controller, and receives a second command related to the first command from the memory controller, the second command being the internal processing operation command.