CPC G11C 7/222 (2013.01) [G11C 7/1009 (2013.01); H03K 5/135 (2013.01)] | 20 Claims |
1. A method of operation within an integrated-circuit component, the method comprising:
receiving, via an external timing signal link, a timing signal having a sequence of data-timing transitions preceded by one or more preamble transitions and succeeded by one or more postamble transitions;
generating a control pulse having a width not greater than a time interval between an initial one of the data-timing transitions and a final one of the data-timing transitions;
logically combining the control pulse and the timing signal to generate a gating pulse having a time-varying phase relative to an internal timing domain of the integrated-circuit component; and
logically combining the gating pulse and the first timing signal to produce a gated instance of the timing signal that lacks the one or more preamble transitions and the one or more postamble transitions.
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