CPC G11C 7/1096 (2013.01) [G11C 7/1069 (2013.01)] | 20 Claims |
1. A storage device comprising:
a cell array comprising a first cell and a second cell, wherein the first cell is coupled to a first conductive line and a specific conductive line, and the second cell is coupled to a second conductive line and the specific conductive line; and
a disturb-free circuit performing a first write operation on the first cell and performing a verification operation on the second cell,
wherein:
the verification operation determines whether data stored in the second cell is disturbed by the first write operation, and
in response to the data stored in the second cell being disturbed by the first write operation, the disturb-free circuit performs a second write operation on the second cell.
|