US 11,749,319 B2
Integrated circuit chip
Chang Kwon Lee, Gyeonggi-do (KR); and Ji Hwan Kim, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Mar. 14, 2022, as Appl. No. 17/693,979.
Claims priority of application No. 10-2021-0166199 (KR), filed on Nov. 26, 2021.
Prior Publication US 2023/0170001 A1, Jun. 1, 2023
Int. Cl. G11C 7/10 (2006.01); G11C 8/18 (2006.01)
CPC G11C 7/1063 (2013.01) [G11C 7/1039 (2013.01); G11C 7/1042 (2013.01); G11C 7/1069 (2013.01); G11C 8/18 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An integrated circuit (IC) chip, comprising:
a plurality of interlayer channels;
at least one data pad;
an identification (ID) generation circuit suitable for generating a chip ID signal by decoding a command/address signal;
a first transmission circuit suitable for transferring a plurality of internal data pieces to a transmission path by aligning a plurality of interlayer data pieces respectively transferred from the plurality of interlayer channels according to a plurality of strobe signals while selectively inverting the plurality of interlayer data pieces according to the chip ID signal; and
a second transmission circuit suitable for transferring the plurality of internal data pieces from the transmission path to the at least one data pad.