CPC G09G 3/36 (2013.01) [G11C 19/28 (2013.01); G09G 3/3674 (2013.01); G09G 2300/0814 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0283 (2013.01); G09G 2310/0286 (2013.01); G09G 2310/08 (2013.01)] | 9 Claims |
1. A bidirectional shift register comprising a plurality of stages,
wherein the bidirectional shift register is configured to perform shift action based on a plurality of clock signals of three or more phases, each of the plurality of clock signals repeating a change from a high level to a low level and a change from the low level to the high level throughout a period during which the shift action is performed,
a signal obtained through sampling a shift start signal by using one of the plurality of clock signals supplied to the plurality of stages is supplied as a shift pulse for a forward shift action to a first stage of the plurality of stages, and
a signal obtained through sampling the shift start signal by using another one of the plurality of clock signals supplied to the plurality of stages is supplied as a shift pulse for a backward shift action to a last stage of the plurality of stages.
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