US 11,748,553 B2
Mask rule checking for curvilinear masks for electronic circuits
Thomas Christopher Cecil, Menlo Park, CA (US)
Assigned to Synopsys, Inc., Sunnvale, CA (US)
Filed by Synopsys, Inc., Mountain View, CA (US)
Filed on Dec. 23, 2022, as Appl. No. 18/88,195.
Application 18/088,195 is a division of application No. 17/572,201, filed on Jan. 10, 2022, granted, now 11,568,127.
Application 17/572,201 is a division of application No. 16/892,252, filed on Jun. 3, 2020, granted, now 11,222,160, issued on Jan. 11, 2022.
Claims priority of provisional application 62/858,714, filed on Jun. 7, 2019.
Prior Publication US 2023/0129457 A1, Apr. 27, 2023
Int. Cl. G06F 30/398 (2020.01); G03F 1/36 (2012.01)
CPC G06F 30/398 (2020.01) [G03F 1/36 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method for performing mask rule checks for a mask representation of an electronic circuit, the method comprising:
receiving the mask representation of the electronic circuit, the mask representation comprising a plurality of geometric shapes;
determining a medial axis for the plurality of geometric shapes, wherein a portion of the medial axis includes points that are equidistant from a pair of geometric shapes; and
for each point from a set of points on the portion of the medial axis:
determining a distance between the point and each geometric shape from the pair of geometric shapes;
determining whether the distance between the point and each of the pair of geometric shapes is less than a threshold distance; and
responsive to determining that the distance between the point and each of the pair of geometric shapes is less than the threshold distance, reporting the pair of geometric shapes as a violation of a mask rule.