CPC G06F 30/39 (2020.01) [G06F 30/30 (2020.01); G06F 30/33 (2020.01); G06F 30/3323 (2020.01); G06F 30/367 (2020.01); G06F 30/392 (2020.01); G06F 30/398 (2020.01); H01L 23/573 (2013.01); G06F 2119/18 (2020.01)] | 20 Claims |
1. A method for accommodating a plurality of designs on a shuttle, comprising:
receiving a first design of a first system-on-chip (SoC) from a first user account with a request to fabricate the first SoC;
receiving a second design of a second SoC with a request to fabricate the second SoC;
determining that the first and second designs are to be fabricated on a semiconductor wafer;
providing the first and second designs to a shuttle manager tool to reserve spots of the first and second designs on the semiconductor wafer; and
sending a request to a fabrication entity to fabricate the first and second designs on the semiconductor wafer.
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