CPC G06F 12/1408 (2013.01) [G06F 12/0246 (2013.01); H04L 9/0643 (2013.01); H04L 9/0825 (2013.01); H04L 9/3242 (2013.01)] | 20 Claims |
1. A memory sub-system comprising:
a set of memory devices; and
a processing device, operatively coupled to the set of memory devices, configured to perform operations comprising:
receiving, from a host system, a request to read an asymmetric public key from a particular memory address of the memory sub-system, the particular memory address being associated with a mode register of the memory sub-system;
sending, to the host system, the asymmetric public key in response to the request;
receiving, from the host system, encrypted data that comprises a first access key and a current host salt value;
decrypting, by an asymmetric private key, the encrypted data to obtain the first access key and the current host salt value from the encrypted data;
determining whether the first access key matches a second access key stored on the memory sub-system;
determining whether the current host salt value matches a current memory sub-system salt value stored on the memory sub-system; and
in response to determining that the first access key matches the second access key and the current host salt value matches the current memory sub-system salt value, granting the host system access to the set of memory devices.
|