US 11,748,265 B2
Memory controller and method of operating the same
Seung Won Yang, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Aug. 26, 2020, as Appl. No. 17/3,351.
Claims priority of application No. 10-2020-0036676 (KR), filed on Mar. 26, 2020.
Prior Publication US 2021/0303476 A1, Sep. 30, 2021
Int. Cl. G06F 12/0891 (2016.01); G06F 12/02 (2006.01); G06F 12/0804 (2016.01); G06F 1/30 (2006.01); G06F 9/30 (2018.01)
CPC G06F 12/0891 (2013.01) [G06F 1/30 (2013.01); G06F 9/30047 (2013.01); G06F 12/0246 (2013.01); G06F 12/0804 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7207 (2013.01)] 19 Claims
OG exemplary drawing
 
1. A memory controller for controlling a memory device, comprising:
a map buffer configured to include storage areas respectively corresponding to one or more indices, wherein each of the one or more indices corresponds to different logical addresses; and
a map update controller configured to generate metadata corresponding to a first logical address based on the first logical address received from an external, to store the metadata in a first storage area among the storage areas, corresponding to a target index among the one or more indices and to overwrite the metadata in the first storage area of the target index when mapping data for the first logical address is updated,
wherein the metadata includes the first logical address, an old physical address previously mapped to the first logical address, and a new physical address currently mapped to the first logical address.