US 11,748,258 B2
Method for managing a memory apparatus
Tsai-Cheng Lin, Hsinchu (TW); and Chun-Kun Lee, Hsinchu County (TW)
Assigned to Silicon Motion, Inc., Hsinchu County (TW)
Filed by Silicon Motion, Inc., Hsinchu County (TW)
Filed on Oct. 27, 2022, as Appl. No. 17/975,565.
Application 17/975,565 is a continuation of application No. 17/351,168, filed on Jun. 17, 2021, granted, now 11,520,697.
Application 17/351,168 is a continuation of application No. 16/888,836, filed on May 31, 2020, granted, now 11,074,176, issued on Jul. 27, 2021.
Application 16/888,836 is a continuation of application No. 16/596,703, filed on Oct. 8, 2019, granted, now 10,795,811, issued on Oct. 6, 2020.
Application 16/596,703 is a continuation of application No. 15/642,295, filed on Jul. 5, 2017, granted, now 10,482,011, issued on Nov. 19, 2019.
Application 15/642,295 is a continuation of application No. 14/566,724, filed on Dec. 11, 2014, abandoned.
Application 14/566,724 is a continuation of application No. 13/604,644, filed on Sep. 6, 2012, granted, now 9,037,832, issued on May 19, 2015.
Application 13/604,644 is a continuation of application No. 12/471,462, filed on May 25, 2009, granted, now 8,285,970, issued on Oct. 9, 2012.
Claims priority of provisional application 61/140,850, filed on Dec. 24, 2008.
Claims priority of provisional application 61/112,173, filed on Nov. 6, 2008.
Prior Publication US 2023/0048550 A1, Feb. 16, 2023
Int. Cl. G06F 12/02 (2006.01); G06F 12/1009 (2016.01)
CPC G06F 12/0246 (2013.01) [G06F 12/1009 (2013.01); G06F 2212/7207 (2013.01); G06F 2212/7208 (2013.01); G06F 2212/7209 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A method for managing a memory apparatus comprising a plurality of non-volatile (NV) memory elements, each NV memory element comprising a plurality of physical blocks, and a volatile memory, the method comprising:
programming at least a physical block of a specific NV memory element of the NV memory elements, comprising:
receiving a first host command from a host;
obtaining a first host address and first data from the first host command; and
linking the first host address to at least a first page of a physical block of the specific NV memory element and storing the first data into the physical block;
before the pages of the physical block are fully programmed, storing a temporary local page linking address table in the volatile memory, and updating the temporary local page linking address table each time a linking relationship between a page of the physical block and a host address is changed;
when the memory apparatus is to be shut down, writing the temporary local page linking address table to the physical block of the specific NV memory element; and
when the memory apparatus begins a start-up process, building a global page address linking table by reading the local page address linking table.