US 11,748,249 B2
Fine grain level memory power consumption control mechanism
Liang Yin, San Jose, CA (US)
Assigned to SAMSUNG ELECTRONICS CO., LTD.
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on May 13, 2022, as Appl. No. 17/744,615.
Application 17/744,615 is a continuation of application No. 15/143,500, filed on Apr. 29, 2016, abandoned.
Claims priority of provisional application 62/279,664, filed on Jan. 15, 2016.
Prior Publication US 2022/0276955 A1, Sep. 1, 2022
Int. Cl. G11C 5/14 (2006.01); G06F 12/00 (2006.01); G06F 1/3234 (2019.01); G06F 1/3225 (2019.01); G11C 5/04 (2006.01)
CPC G06F 12/00 (2013.01) [G06F 1/3225 (2013.01); G06F 1/3275 (2013.01); G11C 5/148 (2013.01); G11C 5/04 (2013.01); Y02D 10/00 (2018.01); Y02D 30/50 (2020.08)] 6 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a memory module comprising:
a first memory bank configured to operate in a first power mode and a second power mode, wherein the second power mode is associated with reduced power consumption relative to the first power mode;
a second memory bank configured to operate in the first power mode and the second power mode;
a first processor circuit configured to place the first memory bank in the second power mode;
a second processor circuit configured to place the second memory bank in the second power mode, wherein the first processor circuit is further configured to maintain a first counter and to place the first memory bank in the second power mode based, at least in part, on a first value of the first counter; and
a memory controller circuit configured to maintain a second counter, wherein the first counter and the second counter are different from each other.