CPC G06F 9/3832 (2013.01) [G06F 9/30043 (2013.01); G06F 9/4881 (2013.01); G06F 9/5077 (2013.01); G06F 12/10 (2013.01); G06F 9/3004 (2013.01); G06F 2212/65 (2013.01)] | 23 Claims |
13. A method comprising:
generating, by a processor core, an I/O instruction for an I/O device, the I/O device including a state machine with state transition logic;
transmitting the I/O instruction generated to the I/O device;
predicting at least one state value of at least one I/O device true state value to be affected by the I/O instruction at the I/O device, the predicting including employing a simplified state machine with a reduced version of the state transition logic of the state machine of the I/O device; and
employing, by the processor core, the at least one state value predicted.
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