US 11,748,078 B1
Generating tie code fragments for binary translation
Alexey Koryakin, Moscow (RU); Nikolay Dobrovolskiy, Moscow (RU); and Serguei M. Beloussov, Singapore (SG)
Assigned to Parallels International GmbH, Schaffhausen (CH)
Filed by PARALLELS INTERNATIONAL GMBH, Schaffhausen (CH)
Filed on Aug. 16, 2022, as Appl. No. 17/820,027.
Application 17/820,027 is a continuation of application No. 16/871,855, filed on May 11, 2020, granted, now 11,455,156.
Application 16/871,855 is a continuation of application No. 16/199,724, filed on Nov. 26, 2018, granted, now 10,691,435, issued on Jun. 23, 2020.
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 9/44 (2018.01); G06F 8/52 (2018.01); G06F 9/30 (2018.01)
CPC G06F 8/52 (2013.01) [G06F 9/30101 (2013.01)] 12 Claims
OG exemplary drawing
 
1. A method comprising:
decoding, by a computer system, a first source code fragment compatible with a source instruction set architecture (ISA);
translating, using a register mapping table, the first source code fragment into a first target code fragment compatible with a target ISA, wherein the register mapping table comprises a plurality of register mapping entries, each register mapping entry specifying a source register and a target register representing the source register in the first target code fragment;
decoding a second source code fragment compatible with the source ISA; and
modifying, based on decoding the second source code fragment, at least one register mapping entry of the register mapping table; wherein
each register mapping entry of the register mapping table further comprises a weight value indicative of a number of binary translation iterations that were performed after a corresponding target register was utilized.