CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0679 (2013.01); G06F 12/0238 (2013.01)] | 22 Claims |
1. An apparatus, comprising:
a volatile memory;
a non-volatile memory; and
an interface controller coupled with the volatile memory and the non-volatile memory, wherein the interface controller is operable to:
receive, from a host device, a read command for a first set of data, the read command associated with a latency for returning the first set of data to the host device;
determine, in response to receiving the read command, that the first set of data is stored in the non-volatile memory and not the volatile memory; and
transmit concurrently, to the host device, a first subset of a second set of data according to the latency for returning the first set of data and a signal that indicates whether the second set of data was requested by the host device.
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