CPC G06F 3/0655 (2013.01) [G06F 3/0605 (2013.01); G06F 3/0679 (2013.01)] | 20 Claims |
1. A system comprising:
a plurality of memory devices;
a memory controller configured to read from and write to at least the plurality of memory devices and perform operations comprising:
obtaining a first request to access a first data of a first size corresponding to the first request and a second request to access a second data of a second size corresponding to the second request at a first memory device of the plurality of memory devices; and
initiating interleaved processing of the respective data corresponding to the first and second requests, wherein the interleaved processing comprises alternating between accessing chunks of the first data corresponding to the first request and accessing chunks of the second data corresponding to the second request;
receiving an indication to stop processing requests to access data at the first memory device and to initiate processing requests to access data at a second memory device of the plurality of memory devices;
determining that the respective data corresponding to the first and second requests have not yet been fully processed at the time of receiving the indication; and
in response, performing operations for remaining portions of the first data and the second data, the performing comprising:
when the remaining portions satisfy a criterion, continuing the interleaved processing until a shorter one of the first data and the second data has been fully processed, and storing a new remaining portion of a longer one of the first data and the second data in memory; and
when the remaining portions do not satisfy the criterion, storing the remaining portions of the first data and the second data in memory for a particular amount of time, and
after the particular amount of time, resuming the interleaved processing of the remaining portions at the first memory device until a shorter one of the first data and the second data has been fully processed.
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