CPC G06F 3/064 (2013.01) [G06F 3/0625 (2013.01); G06F 3/0659 (2013.01); G06F 3/0673 (2013.01); G11C 16/10 (2013.01); G11C 16/0483 (2013.01)] | 20 Claims |
1. A system comprising:
a memory device; and
a processor, operatively coupled to the memory device, the processor to perform operations comprising:
identifying an initial value of a power cycle count associated with the memory device, wherein the power cycle count is incremented responsive to detecting a powering up of the memory device;
responsive to programming a block residing on the memory device, associating the block with a current block family associated with the memory device;
determining a current value of the power cycle count; and
responsive to determining that a difference between the initial value of the power cycle count and the current value of the power cycle count satisfies a predefined condition, closing the current block family.
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