| CPC H04L 63/0807 (2013.01) [H04L 63/0853 (2013.01); H04L 63/10 (2013.01); H04W 12/069 (2021.01); H04W 12/47 (2021.01)] | 19 Claims |
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1. A device for controlling access to one or more protected resources, the device comprising:
a secondary limited clock speed microprocessor coupled to a physical access control device, the secondary limited clock speed microprocessor configured to:
receive and decode authentication electrical pulses from a physical token reader as when a physical token interacts with the physical token reader to generate corresponding user identifier data values, and the secondary limited clock speed microprocessor configured to: transmit electrical pulse signals to an access control management device that provisions access to the one or more protected resources;
a master limited clock speed microprocessor coupled to an external authentication server and the secondary limited clock speed microprocessor, the master limited clock speed microprocessor configured to:
receive the corresponding user identifier data values,
transform the user identifier data values using a one-way function to generate a transformed representation for communication to the transformed representation to the external authentication server,
receive an access provisioning signal from the external authentication server, and
transmit an instruction signal to the secondary limited clock speed microprocessor to control the secondary limited clock speed microprocessor to provision access to the one or more protected resources,
wherein the secondary limited clock speed microprocessor and the master limited clock speed microprocessor are coupled to one another across a message bus connection and a separate interrupt connection, the interrupt connection enabling uni-directional communication from the secondary limited clock speed microprocessor to the master limited clock speed microprocessor to indicate when the physical token interacts with the physical token reader, and
wherein the secondary limited clock speed microprocessor is dedicated to emulate received signals from said physical token reader, and to decode said access control provisioning signal received from said master limited clock speed microprocessor and transmit said decoded access control provision signal to said access control management device in a format and timing that is compatible with said access control management device.
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