CPC H04L 25/08 (2013.01) [H04L 25/03828 (2013.01)] | 20 Claims |
1. A wideband receiver comprising:
an antenna;
a local clock configured to generate clock signals;
an analog-to-digital converter connected and configured to convert analog signals received by the antenna into digital samples in accordance with the clock signals;
an adjunct processing module connected and configured to match filter the digital samples output by the analog-to-digital converter and derive an interpolation coefficient vector from the clock signals and the match-filtered digital samples;
delay circuitry connected and configured to delay the digital samples output by the analog-to-digital converter and received directly by the delay circuitry without match filtering;
an interpolation filter connected and configured to convolve the digital samples output by the delay circuitry with the interpolation coefficient vector output by the adjunct processing module to remove local clock-induced jitter from the digital samples output by the delay circuitry; and
a wideband receiver processing module connected and configured to process digital samples received from the interpolation filter.
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