US 11,736,110 B2
Time-to-digital converter (TDC) to operate with input clock signals with jitter
Nandakishore Palla, Bangalore (IN); Girisha Angadi Basavaraja, Bangalore (IN); Debasish Behera, Bangalore (IN); Raja Prabhu J, Bangalore (IN); Manikanta Sakalabhaktula, Bangalore (IN); and Chandrashekar B G, Bangalore (IN)
Assigned to Shaoxing Yuanfang Semiconductor Co., Ltd., Zhejiang (CN)
Filed by Shaoxing Yuanfang Semiconductor Co., Ltd., Shaoxin (CN)
Filed on May 10, 2022, as Appl. No. 17/662,669.
Claims priority of application No. 202141044473 (IN), filed on Sep. 30, 2021.
Prior Publication US 2023/0108841 A1, Apr. 6, 2023
Int. Cl. H03L 7/085 (2006.01); G04F 10/00 (2006.01); H03L 7/081 (2006.01)
CPC H03L 7/085 (2013.01) [G04F 10/005 (2013.01); H03L 7/081 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A time-to-digital converter (TDC), said TDC comprising:
a count logic to generate a first sequence of counts and a second sequence of counts respectively for a first periodic signal and a second periodic signal received as input signals, said first sequence of counts representing respective time instances on a time scale at which a first sequence of edges with a first direction of said first periodic signal occur, said second sequence of counts representing respective time instances on said time scale at which a second sequence of edges with said first direction of said second periodic signal occur; and
a core logic to identify whether jitter is present in either one of said first periodic signal and said second periodic signal by processing said first sequence of counts and said second sequence of counts.