US 11,735,593 B2
Gate stack dipole compensation for threshold voltage definition in transistors
Ruqiang Bao, Niskayuna, NY (US); Jingyun Zhang, Albany, NY (US); Koji Watanabe, Yokohama (JP); and Jing Guo, Niskayuna, NY (US)
Assigned to International Business Machines Corporation, Armonk, NY (US)
Filed by International Business Machines Corporation, Armonk, NY (US)
Filed on Nov. 4, 2021, as Appl. No. 17/519,541.
Prior Publication US 2023/0134180 A1, May 4, 2023
Int. Cl. H01L 27/12 (2006.01); H01L 21/8234 (2006.01); H01L 21/84 (2006.01); H01L 21/8238 (2006.01)
CPC H01L 27/1203 (2013.01) [H01L 21/823807 (2013.01); H01L 21/84 (2013.01)] 11 Claims
OG exemplary drawing
 
1. A semiconductor structure comprising:
a semiconductor substrate;
a first n-type field effect transistor (nFET) formed on the substrate, wherein the first nFET has a first threshold voltage (Vt0) and a gate of the first nFET comprises a gate electrode and a first work function metal (WFM) layered with a first interfacial layer (IL) and a first high-k dielectric (HK);
a second nFET formed on the substrate, wherein the second nFET has a second threshold voltage (Vt1) and a gate of the second nFET comprises a gate electrode and the first WFM layered with a second IL, a second HK, and a first dipole material; and
a third nFET formed on the substrate, wherein the third nFET has a third threshold voltage (Vt2) and a gate of the third nFET comprises a gate electrode and the first WFM layered with a third IL, a third HK, the first dipole material, and a second dipole material,
wherein the first nFET does not include the first dipole material and does not include the second dipole material, and the second nFET does not include the second dipole material, such that Vt1<Vt2<Vt0.