US 11,735,521 B2
Metal-oxide-semiconductor field-effect-transistors (MOSFET) as antifuse elements
Yu-Lin Chao, Portland, OR (US); Sarvesh H. Kulkarni, Hillsboro, OR (US); Vincent E. Dorgan, Hillsboro, OR (US); and Uddalak Bhattacharya, Beaverton, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Oct. 25, 2021, as Appl. No. 17/510,190.
Application 17/510,190 is a continuation of application No. 15/943,541, filed on Apr. 2, 2018, granted, now 11,189,564.
Prior Publication US 2022/0045001 A1, Feb. 10, 2022
This patent is subject to a terminal disclaimer.
Int. Cl. H10B 20/20 (2023.01); H01L 23/525 (2006.01); H01L 29/78 (2006.01); H01L 27/02 (2006.01)
CPC H01L 23/5252 (2013.01) [H01L 27/0251 (2013.01); H01L 29/7833 (2013.01); H10B 20/20 (2023.02)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit (IC), comprising:
a source electrode on a source area above a substrate;
a drain electrode on a drain area above the substrate;
a channel area including a first channel region adjacent to the source area, and a second channel region adjacent to the drain area, wherein the first channel region includes a dopant of a first concentration, and the second channel region includes the dopant of a second concentration higher than the first concentration;
a gate oxide layer above the channel area;
a gate electrode above the gate oxide layer; and
a conductive path through the gate oxide layer, the conductive path coupling the source electrode and the gate electrode.