CPC G11C 13/0026 (2013.01) [G11C 13/00 (2013.01); G11C 13/003 (2013.01); G11C 13/0004 (2013.01); H10N 70/066 (2023.02); H10N 70/231 (2023.02); H10N 70/882 (2023.02)] | 20 Claims |
1. An apparatus, comprising:
a plurality of conductive pillars over a substrate of a memory die;
a respective set of memory cells, of a plurality of memory cells, along each conductive pillar of the plurality of conductive pillars, each memory cell of the respective set of memory cells coupled with the conductive pillar and coupled with a respective access line of a plurality of access lines; and
a material in contact with the plurality of conductive pillars and configured to dissipate a voltage difference between each conductive pillar of the plurality of conductive pillars and a voltage source.
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