US 11,734,195 B2
Adjustable memory operation settings based on memory sub-system operating requirements
Christopher Bueb, Folsom, CA (US); and Poorna Kale, Folsom, CA (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Dec. 5, 2022, as Appl. No. 18/61,850.
Application 18/061,850 is a continuation of application No. 16/658,971, filed on Oct. 21, 2019, granted, now 11,544,202.
Prior Publication US 2023/0095179 A1, Mar. 30, 2023
Int. Cl. G06F 12/126 (2016.01); G06F 12/02 (2006.01); G11C 11/409 (2006.01); G11C 11/56 (2006.01); G06F 11/30 (2006.01)
CPC G06F 12/126 (2013.01) [G06F 11/3058 (2013.01); G06F 12/0246 (2013.01); G06F 12/0253 (2013.01); G11C 11/409 (2013.01); G11C 11/5628 (2013.01); G06F 2212/7211 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
performing, by a memory sub-system controller of a memory sub-system coupled to a host system, a first set of memory access operations at the memory sub-system based on a first set of memory access operation settings, wherein the first set of memory access operation settings are configured based on a first operating environment of the host system;
detecting, by the memory sub-system controller, that the host system is operating in a second operating environment that is different from the first operating environment;
responsive to detecting that the host system is operating in the second operating environment, determining, by the memory sub-system controller, a level of impact that each operating requirement of a set of operating requirements of the memory sub-system has on a performance of the memory sub-system in view of the second operating environment;
determining, by the memory sub-system controller and based on a respective priority for each operating requirement of the set of operating requirements, a second set of memory access operation settings; and
performing, by the memory sub-system controller, a second set of memory access operations at the memory sub-system based on the second set of memory access operation settings.