US 11,734,180 B2
Memory efficient approach to extending cache
Oran Baruch, Tel Aviv (IL); and Vamsi K. Vankamamidi, Hopkinton, MA (US)
Assigned to EMC IP Holding Company LLC, Hopkinton, MA (US)
Filed by EMC IP Holding Company LLC, Hopkinton, MA (US)
Filed on Jul. 28, 2021, as Appl. No. 17/386,974.
Prior Publication US 2023/0029706 A1, Feb. 2, 2023
Int. Cl. G06F 12/08 (2016.01); G06F 12/0864 (2016.01)
CPC G06F 12/0864 (2013.01) [G06F 2212/1044 (2013.01); G06F 2212/608 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A memory efficient method of extending cache, comprising:
receiving, by a processor, a request to write data;
comparing a size of the data in the write request to a threshold;
when the size of the data exceeds the threshold,
storing the data on a solid state device;
storing, in a metadata log, page descriptors for the data on the solid state device; and
storing, in a first hash table in memory, a reference to a first page descriptor of the page descriptors in the metadata log; and
when the size of the data is below the threshold,
storing the data in a non-volatile random access memory;
storing, in the metadata log, at least one page descriptor for the data; and
storing, in a second hash table in memory, a reference to at least one page descriptor for the data in the metadata log.