CPC C12Q 1/6869 (2013.01) [C12Q 1/6874 (2013.01); G01N 27/414 (2013.01); G01N 27/4145 (2013.01); G01N 27/4148 (2013.01); H01L 21/306 (2013.01); H01L 24/18 (2013.01); H01L 24/20 (2013.01); H01L 24/82 (2013.01); H01L 27/088 (2013.01); H01L 29/78 (2013.01); H01L 2224/04105 (2013.01); H01L 2924/1306 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/1433 (2013.01)] | 20 Claims |
1. A semiconductor device comprising:
a sensor array arranged in a plurality of rows and a plurality of columns, and a microwell array formed over the sensor array, wherein the sensor array comprises a first group of sensors and a second group of sensors; and
sensor array circuitry on the semiconductor device for separate control of the first group of sensors and the second group of sensors; said sensor array circuitry including:
a first row select register to apply a sequence of row select signals to enable the first group of sensors and a second row select register to apply a sequence of row select signals to enable the second group of sensors;
a first column select register to acquire output signals from respective columns of the first group of sensors and a second column select-register to acquire output signals from respective columns of the second group of sensors; and
a first column bias/readout circuit for receiving column output signals from the first group of sensors and a second column bias/readout circuit for receiving column output signals from the second group of sensors.
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