US 11,729,533 B2
Solid-state image sensor
Takashi Moue, Kanagawa (JP); and Yosuke Ueno, Kanagawa (JP)
Assigned to Sony Semiconductor Solutions Corporation, Kanagawa (JP)
Appl. No. 17/430,842
Filed by Sony Semiconductor Solutions Corporation, Kanagawa (JP)
PCT Filed Nov. 14, 2019, PCT No. PCT/JP2019/044753
§ 371(c)(1), (2) Date Aug. 13, 2021,
PCT Pub. No. WO2020/170518, PCT Pub. Date Aug. 27, 2020.
Claims priority of application No. 2019-028965 (JP), filed on Feb. 21, 2019.
Prior Publication US 2022/0166949 A1, May 26, 2022
Int. Cl. H03M 1/06 (2006.01); H04N 25/772 (2023.01); H04N 25/57 (2023.01); H04N 25/75 (2023.01); H04N 25/709 (2023.01)
CPC H04N 25/772 (2023.01) [H04N 25/57 (2023.01); H04N 25/709 (2023.01); H04N 25/75 (2023.01)] 23 Claims
OG exemplary drawing
 
1. An imaging device comprising:
a pixel circuit configured to output a pixel signal;
a pixel signal line coupled to the pixel circuit;
a reference signal generation circuit configured to output a reference signal; and
a comparator including:
a first transistor, wherein a gate of the first transistor is coupled to the reference signal generation circuit and a source of the first transistor is coupled to the pixel signal line, and
a second transistor, wherein a gate of the first second transistor is coupled to a drain of the first transistor and a source of the second transistor is electrically connected to the pixel signal line.